bitkeeper revision 1.1159.183.1 (41a0fd5c_SO-Z8P4u52CN53Q0eDzqg)

Clean up cacheline-alignment attribute usage. Also add an extra byte to the
TSS I/O bitmap as required by the arch manual.

diff --git a/xen/arch/x86/idle0_task.c b/xen/arch/x86/idle0_task.c
index f86722097fab5ffb6c5201f70811ae953dc62029..a8c670c573d63ecee3cbfe9dae360193ce61f797 100644 (file)
--- a/xen/arch/x86/idle0_task.c
+++ b/xen/arch/x86/idle0_task.c
@@ -14,11 +14,4 @@
 
 struct domain idle0_task = IDLE0_TASK(idle0_task);
 
-/*
- * per-CPU TSS segments. Threads are completely 'soft' on Linux,
- * no more per-task TSS's. The TSS size is kept cacheline-aligned
- * so they are allowed to end up in the .data.cacheline_aligned
- * section. Since TSS's are completely CPU-local, we want them
- * on exact cacheline boundaries, to eliminate cacheline ping-pong.
- */ 
-struct tss_struct init_tss[NR_CPUS] __cacheline_aligned;
+struct tss_struct init_tss[NR_CPUS];

diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c
index 33600b8c585e1ff15ef6ced55c42c9cef63a71a5..2e5506c52a36066a6c61facdffff98d8f3ff173d 100644 (file)
--- a/xen/arch/x86/irq.c
+++ b/xen/arch/x86/irq.c
@@ -13,7 +13,7 @@
 #include <xen/sched.h>
 #include <asm/smpboot.h>
 
-irq_desc_t irq_desc[NR_IRQS] __cacheline_aligned;
+irq_desc_t irq_desc[NR_IRQS];
 
 static void __do_IRQ_guest(int irq);
 

diff --git a/xen/arch/x86/memory.c b/xen/arch/x86/memory.c
index d9d10ca29a9e0e1cbd6f435967f662efa484337e..0a15601bf4e0db89e4bed2f3ecf5a246060abfe3 100644 (file)
--- a/xen/arch/x86/memory.c
+++ b/xen/arch/x86/memory.c
@@ -130,7 +130,7 @@ static struct {
     unsigned long       cr0;
     /* If non-NULL, specifies a foreign subject domain for some operations. */
     struct domain      *foreign;
-} percpu_info[NR_CPUS] __cacheline_aligned;
+} __cacheline_aligned percpu_info[NR_CPUS];
 
 /*
  * Returns the current foreign domain; defaults to the currently-executing

diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c
index a8017a4a65bdb3ddf9d77d69cf58e72ba709a99c..05d49a27d03fd0f5bc2d470f9c37e29ed56af574 100644 (file)
--- a/xen/arch/x86/smpboot.c
+++ b/xen/arch/x86/smpboot.c
@@ -67,7 +67,7 @@ static volatile unsigned long cpu_callin_map;
 static volatile unsigned long cpu_callout_map;
 
 /* Per CPU bogomips and other parameters */
-struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
+struct cpuinfo_x86 cpu_data[NR_CPUS];
 
 /* Set when the idlers are all forked */
 int smp_threads_ready;

diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 29fb3a66e05c7b87cdbce7bfa02d0a2675e45e9d..0f64fd9ec28c7909b44b17e578ab9068e2b24a20 100644 (file)
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -713,7 +713,11 @@ __asm__ __volatile__ ("movw %w3,0(%2)\n\t" \
 
 void set_tss_desc(unsigned int n, void *addr)
 {
-    _set_tssldt_desc(gdt_table+__TSS(n), (int)addr, 8299, 0x89);
+    _set_tssldt_desc(
+        gdt_table + __TSS(n),
+        (int)addr,
+        offsetof(struct tss_struct, __cacheline_filler) - 1,
+        0x89);
 }
 
 void __init trap_init(void)

diff --git a/xen/arch/x86/x86_32/xen.lds b/xen/arch/x86/x86_32/xen.lds
index bb9f3278028de6e448cd64d30bd4c42bfe4b63f6..3fc3865e4e0376f12555a163379c243c6f539e2b 100644 (file)
--- a/xen/arch/x86/x86_32/xen.lds
+++ b/xen/arch/x86/x86_32/xen.lds
@@ -65,9 +65,6 @@ SECTIONS
   . = ALIGN(4096);
   .data.page_aligned : { *(.data.idt) } :text
 
-  . = ALIGN(32);
-  .data.cacheline_aligned : { *(.data.cacheline_aligned) } :text
-
   __bss_start = .;             /* BSS */
   .bss : {
        *(.bss)

diff --git a/xen/arch/x86/x86_64/xen.lds b/xen/arch/x86/x86_64/xen.lds
index cdf1a6168ef030b306f4acd42fd2d74de922d540..4763fdf55ae827696464ed804f6560ee799dfe05 100644 (file)
--- a/xen/arch/x86/x86_64/xen.lds
+++ b/xen/arch/x86/x86_64/xen.lds
@@ -63,9 +63,6 @@ SECTIONS
   . = ALIGN(4096);
   .data.page_aligned : { *(.data.idt) } :text
 
-  . = ALIGN(32);
-  .data.cacheline_aligned : { *(.data.cacheline_aligned) } :text
-
   __bss_start = .;             /* BSS */
   .bss : {
        *(.bss)

diff --git a/xen/common/domain.c b/xen/common/domain.c
index d06eacfa89ded01348d16a72756d6339d8037d4e..d4a97d307a41df52248bb6285b6ed9661ec88226 100644 (file)
--- a/xen/common/domain.c
+++ b/xen/common/domain.c
@@ -18,7 +18,7 @@
 #include <asm/domain_page.h>
 
 /* Both these structures are protected by the domlist_lock. */
-rwlock_t domlist_lock __cacheline_aligned = RW_LOCK_UNLOCKED;
+rwlock_t domlist_lock = RW_LOCK_UNLOCKED;
 struct domain *domain_hash[DOMAIN_HASH_SIZE];
 struct domain *domain_list;
 

diff --git a/xen/common/softirq.c b/xen/common/softirq.c
index 7c7e6cc636b4ae36bce681ce6127601c473a1600..2a59925a074f3b8c8453697bf30221ed9b4bd2d9 100644 (file)
--- a/xen/common/softirq.c
+++ b/xen/common/softirq.c
@@ -17,7 +17,7 @@
 
 irq_cpustat_t irq_stat[NR_CPUS];
 
-static softirq_handler softirq_handlers[NR_SOFTIRQS] __cacheline_aligned;
+static softirq_handler softirq_handlers[NR_SOFTIRQS];
 
 asmlinkage void do_softirq()
 {

diff --git a/xen/include/asm-x86/config.h b/xen/include/asm-x86/config.h
index a43afad7094b8e9f8a1f5a87059d7eee73627eac..edffdb1c3b10611ce2106e56d68a7a76cc6c86d1 100644 (file)
--- a/xen/include/asm-x86/config.h
+++ b/xen/include/asm-x86/config.h
@@ -55,8 +55,6 @@
  */
 #define SMP_CACHE_BYTES 64
 #define NR_CPUS 16
-#define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
-#define ____cacheline_aligned __cacheline_aligned
 
 /* Linkage for x86 */
 #define asmlinkage        __attribute__((regparm(0)))

diff --git a/xen/include/asm-x86/hardirq.h b/xen/include/asm-x86/hardirq.h
index 811415e98a1b6534c992b93c6b3164b38510d1da..576efd3c7caece891f73f2e7c8fbc30d997b95a6 100644 (file)
--- a/xen/include/asm-x86/hardirq.h
+++ b/xen/include/asm-x86/hardirq.h
@@ -4,13 +4,12 @@
 #include <xen/config.h>
 #include <xen/cache.h>
 
-/* assembly code in softirq.h is sensitive to the offsets of these fields */
 typedef struct {
        unsigned int __softirq_pending;
        unsigned int __local_irq_count;
        unsigned int __nmi_count;
        unsigned long idle_timestamp;
-} ____cacheline_aligned irq_cpustat_t;
+} __cacheline_aligned irq_cpustat_t;
 
 #include <xen/irq_cpustat.h>   /* Standard mappings for irq_cpustat_t above */
 

diff --git a/xen/include/asm-x86/pda.h b/xen/include/asm-x86/pda.h
index 42f145cba0076670fd46403feca093876ae34bb0..dcecc48f2086a3cf1d8a255f8c092a60d36660f7 100644 (file)
--- a/xen/include/asm-x86/pda.h
+++ b/xen/include/asm-x86/pda.h
@@ -14,7 +14,7 @@ struct x8664_pda {
        int cpunumber;              /* Logical CPU number */
        char *irqstackptr;      /* top of irqstack */
        unsigned long volatile *level4_pgt; 
-} ____cacheline_aligned;
+} __cacheline_aligned;
 
 #define PDA_STACKOFFSET (5*8)
 

diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index f92b95ea8add2d98690bc94c921df898bdf3e7cd..bc0e58bb6e49a8cbce7632860d39173703819c40 100644 (file)
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -280,7 +280,7 @@ static inline void clear_in_cr4 (unsigned long mask)
 #define IOBMP_BYTES             8192
 #define IOBMP_BYTES_PER_SELBIT  (IOBMP_BYTES / 64)
 #define IOBMP_BITS_PER_SELBIT   (IOBMP_BYTES_PER_SELBIT * 8)
-#define IOBMP_OFFSET            offsetof(struct tss_struct,io_bitmap)
+#define IOBMP_OFFSET            offsetof(struct tss_struct, io_bitmap)
 #define IOBMP_INVALID_OFFSET    0x8000
 
 struct i387_state {
@@ -322,9 +322,9 @@ struct tss_struct {
     u16 trace;
 #endif
     u16 bitmap;
-    u8  io_bitmap[IOBMP_BYTES];
+    u8  io_bitmap[IOBMP_BYTES+1];
     /* Pads the TSS to be cacheline-aligned (total size is 0x2080). */
-    u32 __cacheline_filler[6];
+    u8 __cacheline_filler[23];
 };
 
 struct trap_bounce {

diff --git a/xen/include/asm-x86/x86_32/uaccess.h b/xen/include/asm-x86/x86_32/uaccess.h
index 776639782c50e1b2c01ccc7dc0905dbd85a377f4..1b1b28bfe5c6b5522b8ef61dc44e51687c5f4716 100644 (file)
--- a/xen/include/asm-x86/x86_32/uaccess.h
+++ b/xen/include/asm-x86/x86_32/uaccess.h
@@ -23,7 +23,7 @@
 #ifdef CONFIG_X86_INTEL_USERCOPY
 extern struct movsl_mask {
        int mask;
-} ____cacheline_aligned_in_smp movsl_mask;
+} __cacheline_aligned movsl_mask;
 #endif
 
 #define __addr_ok(addr) ((unsigned long)(addr) < HYPERVISOR_VIRT_START)

diff --git a/xen/include/asm-x86/x86_64/desc.h b/xen/include/asm-x86/x86_64/desc.h
index e8556e976edbcb24eafea43eb1bae2a385840196..d1171de39df5c8f634011d43663a5ec1f86f351a 100644 (file)
--- a/xen/include/asm-x86/x86_64/desc.h
+++ b/xen/include/asm-x86/x86_64/desc.h
@@ -82,7 +82,7 @@ union desc_union {
 struct per_cpu_gdt {
        struct ldttss_desc tss;
        struct ldttss_desc ldt; 
-} ____cacheline_aligned; 
+} __cacheline_aligned; 
 
 
 struct Xgt_desc_struct {

diff --git a/xen/include/xen/cache.h b/xen/include/xen/cache.h
index 320867f60d889b058e53182163b435ead92a5dd7..f972dc30d4acd56342f95ee9bf35c39d09544cc8 100644 (file)
--- a/xen/include/xen/cache.h
+++ b/xen/include/xen/cache.h
@@ -12,26 +12,8 @@
 #define SMP_CACHE_BYTES L1_CACHE_BYTES
 #endif
 
-#ifndef ____cacheline_aligned
-#define ____cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
-#endif
-
-#ifndef ____cacheline_aligned_in_smp
-#ifdef CONFIG_SMP
-#define ____cacheline_aligned_in_smp ____cacheline_aligned
-#else
-#define ____cacheline_aligned_in_smp
-#endif /* CONFIG_SMP */
-#endif
-
 #ifndef __cacheline_aligned
-#ifdef MODULE
-#define __cacheline_aligned ____cacheline_aligned
-#else
-#define __cacheline_aligned                                    \
-  __attribute__((__aligned__(SMP_CACHE_BYTES),                 \
-                __section__(".data.cacheline_aligned")))
+#define __cacheline_aligned __attribute__((__aligned__(SMP_CACHE_BYTES)))
 #endif
-#endif /* __cacheline_aligned */
 
 #endif /* __LINUX_CACHE_H */

diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 06233dddd24997613fe71a0b3c4d4cb0cf8c89d8..793a848f6366dc15ca929d1daa344dbfc841ab64 100644 (file)
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -54,7 +54,7 @@ typedef struct {
     struct irqaction *action;  /* IRQ action list */
     unsigned int depth;                /* nested irq disables */
     spinlock_t lock;
-} ____cacheline_aligned irq_desc_t;
+} __cacheline_aligned irq_desc_t;
 
 extern irq_desc_t irq_desc[NR_IRQS];
 

diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h
index d449f6bfaa5ae136a17a0d803693672c95d17a19..970a27c56b590cbb2cda00b2afd08f09087ba84b 100644 (file)
--- a/xen/include/xen/sched.h
+++ b/xen/include/xen/sched.h
@@ -6,6 +6,7 @@
 #include <xen/config.h>
 #include <xen/types.h>
 #include <xen/spinlock.h>
+#include <xen/cache.h>
 #include <asm/regs.h>
 #include <xen/smp.h>
 #include <asm/page.h>